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ST SPC560P34 - Figure 302. TGS in Triggered Mode; Trigger Generator Subunit (TGS)

ST SPC560P34
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RM0046 Cross Triggering Unit (CTU)
Doc ID 16912 Rev 5 605/936
24.3.2 Trigger generator subunit (TGS)
The trigger generator subunit has the following two modes:
Triggered mode—Each event source for the incoming signals can generate as many as
eight trigger event outputs. For the ADC, a commands list is entered by the CPU, and
each event source can generate as many as eight commands or streams of
commands.
Sequential mode—Each event source for the incoming signals can generate one
trigger event output, the next event source generates the next trigger event output, and
so on in a predefined sequence. For the ADC, a commands list is entered by the CPU
and the sequence of the selected incoming trigger events generate commands or
stream of commands.
The TGS Mode is selected using the TGS_M bit in the TGS Control Register.
24.3.3 TGS in triggered mode
The structure of the TGS in Triggered mode is shown in Figure 302.
Figure 302. TGS in triggered mode
The TGS has 16 input signals, each of which is selected from the input selection register
(TGSISR), selecting the states inactive, rising, falling or both. Depending on the selection,
as many as 32 input events can be enabled. These signals are ORed in order to generate
the MRS. The MRS, at the beginning of the control cycle n (defined by the MRS
occurrence), preloads the TGS counter register, using the preload value written into the
CTU Clock (as PWM)
EXT_IN
ETIMER0_IN
PWM_REL
PWM_ODD_x
PWM_EVEN_x
RPWM_x
Individual inputs selection
(rising/falling edges)
OR
Master Reload Signal (MRS)
Triggers Compare Registers
(double-buffered)
Comparators
TGS Counter Compare Register TGS Counter Comparator
TGS Counter STOP Signal
TGS Counter
TGS Counter Reload Register
Prescaler (1, 2, 3, 4)
Input Selection
32-bit Register

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