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ST SPC560P34 - Figure 57. Peripheral Status Register 0 (ME_PS0)

ST SPC560P34
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RM0046 Document revision history
Doc ID 16912 Rev 5 933/936
12-Mar-2012 4
Chapter 2: SPC560P40/34 memory map
Table 3 (Memory map): Changed “Data Flash Array 0 Test Sector” size from 16K to 8K
Chapter 3: Signal Description:
In the Ta ble 6 ( P i n m u x i n g ) :removed Port E[0]
Chapter 4: Clock Description:
Table 9 (Crystal oscillator truth table): removed in normal mode with XOSC enabled the
configuration of oscillator providing external clock.
Section 4.6, IRC 16 MHz internal RC oscillator (RC_CTL): reworded register description
Chapter 6: Mode Entry Module (MC_ME):
Table 37 (MC_ME Register Description): changed ME_PCTL26 description from
“PERIPH26 Control“ to “SafetyPort Control“
Table 38 (MC_ME Memory Map): ME_PS0 register, changed bit name from
“S_PERIPH26” to “S_SafetyPort”
Figure 57 (Peripheral Status Register 0 (ME_PS0)): changed bit name from
“S_PERIPH26” to “S_SafetyPort”
Chapter 11: System Integration Unit Lite (SIUL):
Added new Table 100 (PCR bit implementation by pad type).
Chapter 17: Flash Memory:
Figure 175 (Non-Volatile User Options register (NVUSRO)): removed
OSCILLATOR_MARGIN bit.
Table 171 (NVUSRO field descriptions): removed OSCILLATOR_MARGIN field and
updated UOx bit fields
Figure 151 (Data Flash module structure): Changed “Test Sector” size from 16K to 8K
Table 137 (Flash-related regions in the system memory map): Changed “Data Flash
Array 0 Test Sector” size from 16K to 8K
Table 143 (64 KB data Flash module sectorization): changed reserved area from
0x0081_0000 to 0x00C0_FFFF to 0x0081_0000 to 0x00C0_1FFF
Table 144 (TestFlash structure): Changed reserved area for “Code TestFlash” and “Data
TestFla sh
Section 17.2.4, Memory map and registers description, added a note.
Table 146 (Flash registers): added note for UT2, UMISR2, UMISR3 and UMISR4
registers
Table 148 (Flash 64 KB bank1 register map): replaced UT2, UMISR2, UMISR3 and
UMISR4 registers with reserved space
in the Section 17.3.2, Main features: Removed “One Time Programmable (OTP) area in
TestFlash block"
Added note in Section , User Test 2 register (UT2), Section , User Multiple Input Signature
Register 2 (UMISR2), Section , User Multiple Input Signature Register 3 (UMISR3) and
Section , User Multiple Input Signature Register 4 (UMISR4)
Renamed “Programming considerations“ section with Section 17.3.8, Code Flash
programming considerations
Table 476. Revision history (continued)
Date Revision Changes

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