RM0046 FlexCAN
Doc ID 16912 Rev 5 535/936
BCC bit in the MCR is negated, then the whole Rx Individual Mask Registers address range
(0x0880–0x097F) is considered reserved space.
Note: The individual Rx Mask per Message Buffer feature may not be available in low cost MCUs.
Please consult the specific MCU documentation to find out if this feature is supported. If not
supported, the address range 0x0880–0x097F is considered reserved space, independent
of the value of the BCC bit.
Table 264. FlexCAN module memory map
Offset from
FlexCAN_BASE
0xFFFC_0000
Register Location
0x0000 Module Configuration Register (MCR) on page 22-542
0x0004 Control Register (CTRL) on page 22-546
0x0008 Free Running Timer (TIMER) on page 22-549
0x000C Reserved
0x0010 Rx Global Mask (RXGMASK) on page 22-550
0x0014 Rx Buffer 14 Mask (RX14MASK) on page 22-551
0x0018 Rx Buffer 15 Mask (RX15MASK) on page 22-551
0x001C Error Counter Register (ECR) on page 22-552
0x0020 Error and Status Register (ESR) on page 22-553
0x0024 Reserved
0x0028 Interrupt Masks 1 (IMASK1) on page 22-556
0x002C Reserved
0x0030 Interrupt Flags 1 (IFLAG1) on page 22-557
0x0034–0x005F Reserved
0x0060–0x007F Serial Message Buffers (SMB0–SMB1) – Reserved —
0x0080–0x017F Message Buffers MB0–MB15 on page 22-536
0x0180–0x027F Message Buffers MB16–MB31 on page 22-536
0x0280–0x087F Reserved
0x0880–0x08BF Rx Individual Mask Registers RXIMR0–RXIMR15 on page 22-558
0x08C0–0x08FF Rx Individual Mask Registers RXIMR16–RXIMR31 on page 22-558
0x0900–0x3FFF Reserved
Table 265. FlexCAN register reset status
Register
Affected by hard
reset
Affected by soft
reset
Module Configuration Register (MCR) Yes Yes
Control Register (CTRL) Yes No
Free Running Timer (TIMER) Yes Yes