ST SPC560P34 - Page 303

RM0046 Error Correction Status Module (ECSM)
Doc ID 16912 Rev 5 303/936
0x06 DATA ODD BANK[31]
0x08 ECC ODD[3]
0x0A DATA ODD BANK[30]
0x0C DATA ODD BANK[29]
0x0E DATA ODD BANK[28]
0x10 ECC ODD[4]
0x12 DATA ODD BANK[27]
0x14 DATA ODD BANK[26]
0x16 DATA ODD BANK[25]
0x18 DATA ODD BANK[24]
0x1A DATA ODD BANK[23]
0x1C DATA ODD BANK[22]
0x50 DATA ODD BANK[21]
0x20 ECC ODD[5]
0x22 DATA ODD BANK[20]
0x24 DATA ODD BANK[19]
0x26 DATA ODD BANK[18]
0x28 DATA ODD BANK[17]
0x2A DATA ODD BANK[16]
0x2C DATA ODD BANK[15]
0x58 DATA ODD BANK[14]
0x30 DATA ODD BANK[13]
0x32 DATA ODD BANK[12]
0x34 DATA ODD BANK[11]
0x64 DATA ODD BANK[10]
0x38 DATA ODD BANK[9]
0x62 DATA ODD BANK[8]
0x70 DATA ODD BANK[7]
0x60 DATA ODD BANK[6]
0x40 ECC ODD[6]
0x42 DATA ODD BANK[5]
0x44 DATA ODD BANK[4]
0x46 DATA ODD BANK[3]
0x48 DATA ODD BANK[2]
0x4A DATA ODD BANK[1]
Table 130. RAM syndrome mapping for single-bit correctable errors (continued)
RESR[7:0] Data Bit in Error