RM0046 Flash Memory
Doc ID 16912 Rev 5 343/936
LAS[2:0]
9:11
Low Address Space 2–0
The value of the LAS field corresponds to the configuration of the Low Address Space:
000 Reserved
001 Reserved
010 32 KB + (2 × 16 KB) + (2 × 32 KB) + 128 KB (the value for the SPC560P40/34device in the
code Flash module)
011 Reserved
100 Reserved
101 Reserved
110 4 × 16 KB (the value for the SPC560P40/34device in the data Flash module)
111 Reserved
The value for this bitfield is different between the code and data Flash modules.
12:14
Reserved (Read Only)
A write to these bits has no effect. A read of these bits always outputs 0.
MAS
15
Mid Address Space
The value of the MAS field corresponds to the configuration of the Mid Address Space:
0 0KB or 2×128KB
1 Reserved
EER
16
ECC Event Error
EER provides information on previous reads. When an ECC Double Error detection occurs, the EER
bit is set to 1.
This bit must then be cleared, or a reset must occur before this bit will return to a 0 state. This bit
may not be set to 1 by the user.
In the event of a ECC Single Error detection and correction, this bit will not be set.
If EER is not set, or remains 0, this indicates that all previous reads (from the last reset, or clearing
of EER) were correct.
Since this bit is an error flag, it must be cleared to 0 by writing 1 to the register location. A write of 0
will have no effect.
0 Reads are occurring normally.
1 An ECC Double Error occurred during a previous read.
RWE
17
Read-while-Write event Error
RWE provides information on previous reads when a Modify operation is on going. If a RWW Error
occurs, the RWE bit is set to 1. Read-While-Write Error means that a read access to the Flash
module has occurred while the FPEC was performing a program or Erase operation or an Array
Integrity Check.
This bit must then be cleared, or a reset must occur before this bit will return to a 0 state. This bit
may not be set to 1 by the user.
If RWE is not set, or remains 0, this indicates that all previous RWW reads (from the last reset, or
clearing of RWE) were correct.
Since this bit is an error flag, it must be cleared to 0 by writing 1 to the register location. A write of 0
will have no effect.
0 Reads are occurring normally.
1 A RWW Error occurred during a previous read.
If stall/terminate-while-write is used, the software should ignore the setting of the RWE flag and should clear
this flag after each erase operation. If stall/terminate-while-write is not used, software can handle the
RWE error normally.
18:19
Reserved (Read Only)
A write to these bits has no effect. A read of these bits always outputs 0.
Table 149. MCR field descriptions (continued)
Field Description
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