ST SPC560P34 User Manual

RM0046 Deserial Serial Peripheral Interface (DSPI)
Doc ID 16912 Rev 5 449/936
7
LSBFE
LSB First
The LSBFE bit selects if the LSB or MSB of the frame is transferred first. This bit is only used in
Master Mode.
0 Data is transferred MSB first.
1 Data is transferred LSB first.
8–9
PCSSCK[0:1]
PCS to SCK Delay Prescaler
The PCSSCK field selects the prescaler value for the delay between assertion of PCS and the
first edge of the SCK. This field is only used in Master Mode. The table lists the prescaler values.
See the CSSCK[0:3] field description for details on how to compute the PCS to SCK delay.
10–11
PASC[0:1]
After SCK Delay Prescaler
The PASC field selects the prescaler value for the delay between the last edge of SCK and the
negation of PCS. This field is only used in Master Mode. The table lists the prescaler values.
See the ASC[0:3] field description for details on how to compute the After SCK delay.
12–13
PDT[0:1]
Delay after Transfer Prescaler
The PDT field selects the prescaler value for the delay between the negation of the PCS signal
at the end of a frame and the assertion of PCS at the beginning of the next frame. The PDT field
is only used in Master Mode. The table lists the prescaler values. See the DT[0:3] field
description for details on how to compute the delay after transfer.
Table 208. DSPIx_CTARn field descriptions (continued)
Field Descriptions
PCSSCK PCS to SCK delay prescaler value
00 1
01 3
10 5
11 7
PASC After SCK delay prescaler value
00 1
01 3
10 5
11 7
PDT Delay after transfer prescaler value
00 1
01 3
10 5
11 7

ST SPC560P34 Specifications

General

Brand	ST
Model	SPC560P34
Category	Microcontrollers
Language	English