ST SPC560P34 - Page 456

Deserial Serial Peripheral Interface (DSPI) RM0046
456/936 Doc ID 16912 Rev 5
DSPI PUSH TX FIFO Register (DSPIx_PUSHR)
The DSPIx_PUSHR provides a means to write to the TX FIFO. Data written to this register
is transferred to the TX FIFO. Refer to Section , “Transmit First In First Out (TX FIFO)
buffering mechanism for more information. Write accesses of 8 or 16 bits to the
DSPIx_PUSHR transfer 32 bits to the TX FIFO.
3
EOQF_RE
DSPI finished request enable
Enables the EOQF flag in the DSPIx_SR to generate an interrupt request.
0 EOQF interrupt requests are disabled.
1 EOQF interrupt requests are enabled.
4
TFUF_RE
Transmit FIFO underflow request enable
The TFUF_RE bit enables the TFUF flag in the DSPIx_SR to generate an interrupt request.
0 TFUF interrupt requests are disabled.
1 TFUF interrupt requests are enabled.
5 Reserved
6
TFFF_RE
Transmit FIFO fill request enable
Enables the TFFF flag in the DSPIx_SR to generate a request. The TFFF_DIRS bit selects between
generating an interrupt request or a DMA requests.
0 TFFF interrupt requests or DMA requests are disabled.
1 TFFF interrupt requests or DMA requests are enabled.
7
TFFF_DIRS
Transmit FIFO fill DMA or interrupt request select
Selects between generating a DMA request or an interrupt request. When the TFFF flag bit in the
DSPIx_SR is set, and the TFFF_RE bit in the DSPIx_RSER is set, this bit selects between
generating an interrupt request or a DMA request.
0 Interrupt request is selected.
1 DMA request is selected.
8–11 Reserved
12
RFOF_RE
Receive FIFO overflow request enable
Enables the RFOF flag in the DSPIx_SR to generate an interrupt requests.
0 RFOF interrupt requests are disabled.
1 RFOF interrupt requests are enabled.
13 Reserved
14
RFDF_RE
Receive FIFO drain request enable
Enables the RFDF flag in the DSPIx_SR to generate a request. The RFDF_DIRS bit selects
between generating an interrupt request or a DMA request.
0 RFDF interrupt requests or DMA requests are disabled.
1 RFDF interrupt requests or DMA requests are enabled.
15
RFDF_DIRS
Receive FIFO drain DMA or interrupt request select
Selects between generating a DMA request or an interrupt request. When the RFDF flag bit in the
DSPIx_SR is set, and the RFDF_RE bit in the DSPIx_RSER is set, the RFDF_DIRS bit selects
between generating an interrupt request or a DMA request.
0 Interrupt request is selected.
1 DMA request is selected.
16–31 Reserved
Table 216. DSPIx_RSER field descriptions (continued)
Field Description