LIN Controller (LINFlex) RM0046
524/936 Doc ID 16912 Rev 5
If a valid Break Field and Break Delimiter come before the end of the current header or at
any time during a data field, the current header or data is discarded and the state machine
synchronizes on this new break.
Valid message
A received or transmitted message is considered as valid when the data has been received
or transmitted without error according to the LIN protocol.
Overrun
Once the messages buffer is full (LINSR[RMB] = 1) the next valid message reception leads
to an overrun and message is lost. The hardware signals the overrun condition by setting
the BOF bit in the LINESR. Which message is lost depends on the buffer lock function
control bit RBLM.
● If the buffer lock function control bit is cleared (LINCR1[RBLM] = 0) the old message in
the buffer will be overwritten by the most recent message.
● If buffer lock function control bit is set (LINCR1[RBLM] = 1) the most recent message is
discarded, and the oldest message is available in the buffer.
● If buffer is not released (LINSR[RMB] = 1) before reception of next Identifier and if
RBLM is set then ID along with the data is discarded.
Slave mode with identifier filtering
In the LIN protocol the identifier of a message is not associated with the address of a node
but related to the content of the message. Consequently a transmitter broadcasts its
message to all receivers. On header reception a slave node decides
—depending on the
identifier value
—whether the software needs to receive or send a response. If the message
does not target the node, it must be discarded without software intervention.
To fulfill this requirement, the LINFlex controller provides configurable filters in order to
request software intervention only if needed. This hardware filtering saves CPU resources
that would otherwise be needed by software for filtering.
Filter mode
Usually each of the sixteen IFCR registers filters one dedicated identifier, but this limits the
number of identifiers LINFlex can handle to the number of IFCR registers implemented in
the device. Therefore, in order to be able to handle more identifiers, the filters can be
configured in mask mode.
In identifier list mode (the default mode), both filter registers are used as identifier
registers. All bits of the incoming identifier must match the bits specified in the filter register.
In mask mode, the identifier registers are associated with mask registers specifying which
bits of the identifier are handled as “must match” or as “don’t care”. For the bit mapping and
registers organization, please see Figure 258.
To Next Page
Loading...
