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RM0046 FlexPWM
Doc ID 16912 Rev 5 653/936
4
PWMB_INIT
PWMB Initial Value
This read/write bit determines the initial value for PWMB and the value to which it is forced when
FORCE_INIT is asserted.
5
PWMX_INIT
PWMX Initial Value
This read/write bit determines the initial value for PWMX and the value to which it is forced when
FORCE_INIT is asserted.
6:7
INIT_SEL
Initialization Control Select
These read/write bits control the source of the INIT signal that goes to the counter.
00 Local sync (PWMX) causes initialization.
01 Master reload from submodule 0 causes initialization. This setting should not be used in
submodule 0 as it will force the INIT signal to logic 0.
10 Master sync from submodule 0 causes initialization. This setting should not be used in
submodule 0 as it will force the INIT signal to logic 0.
11 EXT_SYNC causes initialization.
8
FRCEN
Force Initialization Enable
This bit allows the FORCE_OUT signal to initialize the counter without regard to the signal
selected by INIT_SEL. This is a software controlled initialization.
0 Initialization from a Force Out event is disabled.
1 Initialization from a Force Out event is enabled.
9
FORCE
Force Initialization
If the FORCE_SEL bits = 000, writing a 1 to this bit results in a Force Out event. This causes the
following actions to be taken:
The PWMA and PWMB output pins will assume values based on the SELA and SELB bits.
If the FRCEN bit is set, the counter value will be initialized with the INIT register value.
10:12
FORCE_SEL
Force Source Select
This read/write bit determines the source of the FORCE OUTPUT signal for this submodule.
000 The local force signal, FORCE, from this submodule is used to force updates.
001 The master force signal from submodule 0 is used to force updates. This setting should not be
used in submodule 0 as it will hold the FORCE OUTPUT signal to logic 0.
010 The local reload signal from this submodule is used to force updates.
011 The master reload signal from submodule 0 is used to force updates. This setting should not
be used in submodule 0 as it will hold the FORCE OUTPUT signal to logic 0.
100 The local sync signal from this submodule is used to force updates.
101 The master sync signal from submodule 0 is used to force updates. This setting should not be
used in submodule 0 as it will hold the FORCE OUTPUT signal to logic 0.
110 The external force signal, EXT_FORCE, from outside the PWM module causes updates.
111 Reserved.
Table 343. CTRL2 field descriptions (continued)
Field Description

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