RM0046 IEEE 1149.1 Test Access Port Controller (JTAGC)
Doc ID 16912 Rev 5 849/936
BYPASS instruction
BYPASS selects the bypass register, creating a single-bit shift register path between TDI
and TDO. BYPASS enhances test efficiency by reducing the overall shift path when no test
operation of the MCU is required. This allows more rapid movement of test data to and from
other components on a board that are required to perform test functions. While the BYPASS
instruction is active the system logic operates normally.
ACCESS_AUX_TAP_x instructions
The ACCESS_AUX_TAP_x instructions allow the Nexus modules on the MCU to take
control of the TAP. When this instruction is loaded, control of the TAP pins is transferred to
the selected auxiliary TAP controller. Any data input via TDI and TMS is passed to the
selected TAP controller, and any TDO output from the selected TAP controller is sent back to
the JTAGC to be output on the pins. The JTAGC regains control of the JTAG port during the
UPDATE-DR state if the PAUSE-DR state was entered. Auxiliary TAP controllers are held in
RUN-TEST/IDLE while they are inactive.
CLAMP instruction
CLAMP allows the state of signals driven from MCU pins to be determined from the
boundary scan register while the bypass register is selected as the serial path between TDI
and TDO. CLAMP enhances test efficiency by reducing the overall shift path to a single bit
(the bypass register) while conducting an EXTEST type of instruction through the boundary
scan register. CLAMP also asserts the internal system reset for the MCU to force a
predictable internal state.
EXTEST — external test instruction
EXTEST selects the boundary scan register as the shift path between TDI and TDO. It
allows testing of off-chip circuitry and board-level interconnections by driving preloaded data
contained in the boundary scan register onto the system output pins. Typically, the
preloaded data is loaded into the boundary scan register using the SAMPLE/PRELOAD
instruction before the selection of EXTEST. EXTEST asserts the internal system reset for
the MCU to force a predictable internal state while performing external boundary scan
operations.
HIGHZ instruction
HIGHZ selects the bypass register as the shift path between TDI and TDO. While HIGHZ is
active, all output drivers are placed in an inactive drive state (for example, high impedance).
HIGHZ also asserts the internal system reset for the MCU to force a predictable internal
state.
Factory Debug Reserved
(1)
00101
00110
01010
Intended for factory debug only
Reserved
All Other
Codes
Decoded to select bypass register
1. Intended for factory debug, and not customer use.
Table 456. JTAG instructions (continued)
Instruction Code[4:0] Instruction summary
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