Flash Memory RM0046
372/936 Doc ID 16912 Rev 5
Double word program
A Flash program sequence operates on any double word within the Flash core.
One or both words within a double word may be altered in a single program operation.
Whenever the Flash is programmed, ECC bits are also programmed (unless the selected
address belongs to a sector in which the ECC has been disabled in order to allow bit
manipulation). ECC is handled on a 64-bit boundary. Thus, if only one word in any given 64-
bit ECC segment is programmed, the adjoining word (in that segment) should not be
programmed since ECC calculation has already completed for that 64-bit segment.
Attempts to program the adjoining word will probably result in an operation failure. It is
recommended that all programming operations be of 64 bits. The programming operation
should completely fill selected ECC segments within the double word.
Programming changes the value stored in an array bit from logic 1 to logic 0 only.
Programming cannot change a stored logic 0 to a logic 1.
Addresses in locked/disabled blocks cannot be programmed.
The user may program the values in any or all of 2 words of a double word with a single
program sequence.
Double word-bound words have addresses that differ only in address bit 2.
The program operation consists of the following sequence of events:
1. Change the value in the MCR[PGM] bit from 0 to 1.
2. Ensure the block that contains the address to be programmed is unlocked.
a) Write the first address to be programmed with the program data.
b) The Flash module latches address bits (22:3) at this time.
c) The Flash module latches data written as well.
d) This write is referred to as a program data interlock write. An interlock write may
be as large as 64 bits, and as small as 32 bits (depending on the CPU bus).
3. If more than 1 word is to be programmed, write the additional address in the double
word with data to be programmed. This is referred to as a program data write.
The Flash module ignores address bits (22:3) for program data writes.
The eventual unwritten data word defaults to 0xFFFF_FFFF.
4. Set MCR[EHV] to 1 to start the internal program sequence, or skip to step 9 to
terminate.
5. Wait until the MCR[DONE] bit goes high.
6. Confirm MCR[PEG] = 1.
7. Write a logic 0 to the MCR[EHV] bit.
8. If more addresses are to be programmed, return to step 2.
9. Write a logic 0 to the MCR[PGM] bit to terminate the program operation.
A program operation may be initiated with the 0-to-1 transition of the MCR[PGM] bit or by
clearing the MCR[EHV] bit at the end of a previous program.
The first write after a program is initiated determines the page address to be programmed.
This first write is referred to as an interlock write. The interlock write determines whether the
shadow, test, or normal array space will be programmed by causing MCR[PEAS] to be
set/cleared.
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