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ST SPC560P34
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RM0046 Flash Memory
Doc ID 16912 Rev 5 373/936
An interlock write must be performed before setting MCR[EHV]. The user may terminate a
program sequence by clearing MCR[PGM] prior to setting MCR[EHV].
After the interlock write, additional writes only affect the data to be programmed at the word
location determined by address bit 2. Unwritten locations default to a data value of
0xFFFF_FFFF. If multiple writes are done to the same location, the data for the last write is
used in programming.
While MCR[DONE] is low and MCR[EHV] is high, the user may clear MCR[EHV], resulting
in a program terminate. A program termination forces the module to step 8 of the program
sequence.
A terminated program results in MCR[PEG] being cleared, indicating a failed operation.
MCR[DONE] must be checked to know when the terminating command has completed.
The data space being operated on before the termination will contain indeterminate data.
This may be recovered by repeating the same program instruction or executing an erase of
the affected blocks.
Example 1Double word program of data 0x55AA_55AA at address 0x00_AAA8 and data
0xAA55_AA55 at address 0x00_AAAC
MCR = 0x00000010; /* Set PGM in MCR: Select Operation */
(0x00AAA8) = 0x55AA55AA; /* Latch Address and 32 LSB data */
(0x00AAAC) = 0xAA55AA55; /* Latch 32 MSB data */
MCR = 0x00000011; /* Set EHV in MCR: Operation Start */
do /* Loop to wait for DONE=1 */
{ tmp = MCR; /* Read MCR */
} while ( !(tmp & 0x00000400) );
status = MCR & 0x00000200; /* Check PEG flag */
MCR = 0x00000010; /* Reset EHV in MCR: Operation End */
MCR = 0x00000000; /* Reset PGM in MCR:
Deselect Operation */
Sector erase
Erase changes the value stored in all bits of the selected block(s) to logic 1.
An erase sequence operates on any combination of blocks (sectors) in the low or mid
address space, or the shadow block (if available). The test block cannot be erased.
The erase sequence is fully automated within the Flash. The user only needs to select the
blocks to be erased and initiate the erase sequence.
Locked/disabled blocks cannot be erased.
If multiple blocks are selected for erase during an erase sequence, no specific operation
order must be assumed.
The Erase operation consists of the following sequence of events:
1. Change the value in the MCR[ERS] bit from 0 to 1.
2. Select the block(s) to be erased by writing 1s to the LMS register. If the shadow block is
to be erased, this step may be skipped, and LMS is ignored.

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