RM0046 Flash Memory
Doc ID 16912 Rev 5 375/936
Once suspended, the array may be read. Flash core reads while MCR[ESUS] = 1 from the
block(s) being erased return indeterminate data.
Example 3Sector Erase Suspend
MCR = 0x00000007; /* Set ESUS in MCR: Erase Suspend */
do /* Loop to wait for DONE=1 */
{ tmp = MCR; /* Read MCR */
} while ( !(tmp & 0x00000400) );
Notice that there is no need to clear MCR[EHV] and MCR[ERS] in order to perform reads
during erase suspend.
The Erase sequence is resumed by writing a logic 0 to MCR[ESUS].
MCR[EHV] must be set to 1 before MCR[ESUS] can be cleared to resume the operation.
The Module continues the erase sequence from one of a set of predefined points. This may
extend the time required for the erase operation.
Example 4Sector Erase Resume
MCR = 0x00000005; /* Reset ESUS in MCR:
Erase Resume */
User Test mode
User Test mode is a customer-accessible mode that can be used to perform specific tests to
check the integrity of the Flash module. Three kinds of test can be performed:
● Array integrity self-check
● Margin mode read
● ECC logic check
The User Test mode is equivalent to a Modify operation. Read accesses attempted by the
user during User Test mode generate a Read-While-Write Error (the MCR[RWE] bit is set).
User Test operations are not allowed on the Test and Shadow blocks.
Array integrity self check
Array integrity is checked using a predefined address sequence (proprietary), and this
operation is executed on selected and unlocked blocks. Once the operation is completed,
the results of the reads can be checked by reading the MISR value (stored in UMISR0–4), to
determine if an incorrect read, or ECC detection was noted.
The internal MISR calculator is a 32-bit register.
The 128-bit data, the 16-bit ECC data, and the single and double ECC errors of the two
double words are therefore captured by the MISR through five different read accesses at the
same location.
The whole check is done through five complete scans of the memory address space:
1. The first pass scans only bits 31:0 of each page.
2. The second pass scans only bits 63:32 of each page.
3. The third pass scans only bits 95:64 of each page.
4. The fourth pass scans only bits 127:96 of each page.
5. The fifth pass scans only the ECC bits (8 + 8) and the single and double ECC errors
(2 + 2) of both double words of each page.
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