RM0046 FlexCAN
Doc ID 16912 Rev 5 545/936
10
WRN_EN
Warning Interrupt Enable
When asserted, this bit enables the generation of the TWRN_INT and RWRN_INT flags in the
Error and Status Register. If WRN_EN is negated, the TWRN_INT and RWRN_INT flags will
always be zero, independent of the values of the error counters, and no warning interrupt will ever
be generated.
0 TWRN_INT and RWRN_INT bits are zero, independent of the values in the error counters.
1 TWRN_INT and RWRN_INT bits are set when the respective error counter transition from <96
to 96.
11
LPM_ACK
Low Power Mode Acknowledge
This read-only bit indicates that FlexCAN is either in Disable Mode or Stop Mode. Either of these
low power modes can not be entered until all current transmission or reception processes have
finished, so the CPU can poll the LPM_ACK bit to know when FlexCAN has actually entered low
power mode. See Section , “Module disable mode and Section , “Stop mode for more information.
0 FlexCAN not in any of the low power modes.
1 FlexCAN is either in Disable Mode or Stop mode.
14
SRX_DIS
Self Reception Disable
This bit defines whether FlexCAN is allowed to receive frames transmitted by itself. If this bit is
asserted, frames transmitted by the module will not be stored in any MB, regardless if the MB is
programmed with an ID that matches the transmitted frame, and no interrupt flag or interrupt signal
will be generated due to the frame reception.
0 Self reception enabled
1 Self reception disabled
15
BCC
Backwards Compatibility Configuration
This bit is provided to support Backwards Compatibility with previous FlexCAN versions. When this
bit is negated, the following configuration is applied:
– For MCUs supporting individual Rx ID masking, this feature is disabled. Instead of individual ID
masking per MB, FlexCAN uses its previous masking scheme with RXGMASK, RX14MASK and
RX15MASK.
– The reception queue feature is disabled. Upon receiving a message, if the first MB with a
matching ID that is found is still occupied by a previous unread message, FlexCAN will not look
for another matching MB. It will override this MB with the new message and set the CODE field
to ‘0110’ (overrun).
Upon reset this bit is negated, allowing legacy software to work without modification.
0 Individual Rx masking and queue feature are disabled.
1 Individual Rx masking and queue feature are enabled.
18
LPRIO_EN
Local Priority Enable
This bit is provided for backwards compatibility reasons. It controls whether the local priority
feature is enabled or not. It extends the ID used during the arbitration process. With this extended
ID concept, the arbitration process is done based on the full 32-bit word, but the actual transmitted
ID still has 11-bit for standard frames and 29-bit for extended frames.
0 Local Priority disabled
1 Local Priority enabled
19
AEN
Abort Enable
This bit is supplied for backwards compatibility reasons. When asserted, it enables the Tx abort
feature. This feature guarantees a safe procedure for aborting a pending transmission, so that no
frame is sent in the CAN bus without notification.
0 Abort disabled
1 Abort enabled
Table 273. MCR field descriptions (continued)
Field Description
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