Nexus Development Interface (NDI) RM0046
876/936 Doc ID 16912 Rev 5
8:9 DAC12M
Data Address Compare 1/2 Mode
00 – Exact address compare. DAC1 debug events can only occur if the address of the data
access is equal to the value specified in DAC1. DAC2 debug events can only occur if the
address of the data access is equal to the value specified in DAC2.
01 – Address bit match. DAC1 debug events can occur only if the address of the data access
ANDed with the contents of DAC2, are equal to the contents of DAC1 also ANDed with
the contents of DAC2. DAC2 debug events do not occur. DAC1US and DAC1ER settings
are used.
10 – Inclusive address range compare. DAC1 debug events can occur only if the address of
the data access is greater than or equal to the value specified in DAC1 and less than the
value specified in DAC2. DAC2 debug events do not occur. DAC1US and DAC1ER
settings are used.
11 – Exclusive address range compare. DAC1 debug events can occur only if the address of
the data access is less than the value specified in DAC1 or is greater than or equal to the
value specified in DAC2. DAC2 debug events do not occur. DAC1US and DAC1ER
settings are used.
10 DAC1LNK
Data Address Compare 1 Linked
0 – no affect
1 – DAC1 debug events are linked to IAC1 debug events. IAC1 debug events do not affect
DBSR
When linked to IAC1, DAC1 debug events are conditioned based on whether the instruction
also generated an IAC1 debug event
11 DAC2LNK
Data Address Compare 2 Linked
0 – no affect
1 – DAC 2 debug events are linked to IAC3 debug events. IAC3 debug events do not affect
DBSR
When linked to IAC3, DAC2 debug events are conditioned based on whether the instruction
also generated an IAC3 debug event. DAC2 can only be linked if DAC12M specifies Exact
Address Compare since DAC2 debug events are not generated in the other compare modes.
Table 461. DBCR2 Bit Definitions (continued)
Bit(s) Name Description
To Next Page
Loading...
