Document revision history RM0046
926/936 Doc ID 16912 Rev 5
30-Jun-2010 2
12, “e200z0 and e200z0h Core
Section 12.2, “Features: Removed bullet “Power saving modes: doze, nap, sleep, and
wait”
13, “Peripheral Bridge (PBRIDGE): Unchanged from previous revision
14, “Crossbar Switch (XBAR): Unchanged from previous revision
15, “Error Correction Status Module (ECSM)
Replaced occurrences of “AXBS_lite” and “AXBS” with “XBAR”
Section 15.4.3, “ECSM_reg_protection: Replaced AIPS with PBRIDGE
16, “Internal Static RAM (SRAM)
Editorial and formatting changes
SRAM memory map: Replaced SRA with “—” in register description column
17, “Flash Memory
Section 17.2.6, “Basic interface protocol: Specified that haddr represents the Flash
address
Section 17.2.17, “Wait state emulation: Specified that haddr represents the Flash address
18, “Enhanced Direct Memory Access (eDMA)
Minor formatting changes
19, “DMA Channel Mux (DMA_MUX)
Updated DMA channel mapping
20, “Deserial Serial Peripheral Interface (DSPI)
Minor formatting changes
DSPI memory map: Updated reset values
DSPI Clock and Transfer Attributes Registers 0–7 (DSPIx_CTARn)—Changed reset value
of field FMSZ[3:0] from ‘0000’ to ‘1111’
21, “LIN Controller (LINFlex)
Minor formatting changes
Updated Table 232., “Error calculation for programmed baud rates (baud rate 10417) and
LFDIV note above table
22, “FlexCAN
Minor editorial changes; minor formatting changes to bitmap reset value rows
Section 22.3.1, “FlexCAN memory mapping: Updated address offset ranges and RAM
sizes
Section , “Module Configuration Register (MCR): Changed DOZE field to reserved bit
Module Configuration Register (MCR): Changed reset value for field MAXMB[5:0] from
000000 to 001111
Section , “Rx Individual Mask Registers (RXIMR0–RXIMR31): Replaced “RXIM63” with
“RXIMR31” in bitmap and field description titles
Section , “Freeze mode: Deleted “(Disable, Doze, Stop)” in first paragraph
Section 22.4.11, “Bus interface: Updated address offset ranges
Table 476. Revision history (continued)
Date Revision Changes