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ST SPC560P34
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RM0046 Document revision history
Doc ID 16912 Rev 5 929/936
11-May-2011 3
“Preface” chapter, entirely rewrote
“SPC560P40/34 block diagram”, made arrow going from peripheral bridge to crossbar
switch bidirectional
“Clock Description” chapter
In the “Functional description” section, replaced all occurences of XTALOUT with
EXTAL.
Removed “Nexus Message Clock (MCKO)” and “Software controlled power
management/clock gating”.
“Interrupt controller” chapter:
– Added back MC_ prefixes:
–– was ME; is MC_ME
–– was RGM; is MC_RGM
– In the “Interrupt vector table”, the row 63 was “reserved”; is ADC_ER.
– In the “INTC memory map” table, removed access and reset columns.
“System Integration Unit Lite (SIUL)” chapter:
In the "MCU ID Register # (MIDR2)" section:
replaced reset value of EE:x is now 0
renamed the bit field "FR" with "FF"
In the "MIDR2 field description" table, renamed the bit field "FR" with "FF" and replaced
its description with "N/A"
In the "MCU ID Register #2 (MIDR2)" section:
– replaced reset value of EE:x is now 0
– shown both FLASH_SIZE_2 and FF fields as reserved
– renamed FLASH_SIZE_1 to FLASH_SIZE
– changed the description of FLASH_SIZE_1: was “0011: 128 KB”, is now “0011: 192
KB”
“e200z0 and e200z0h Core” chapter:
In the “Core registers and programmer’s model” section, removed note concerning the
register numbering.
“Error Correction Status Module (ECSM)” chapter
Replaced all ocurences of “AXBS” with “XBAR”
In the “Spp_Ips_Reg_Protection block diagram” figure, replaced “AIPS_LITE” with
“PBRIDGE”
“Flash Memory” chapter
In the “Memory map” section, added a “caution” and a “note” concerning the register
management.
“DMA Channel Mux (DMA_MUX)” chapter
In the “DMA_MUX memory map” table, removed access and reset columns.
In the “DMA mux channel 4–15 block diagram” figure, added “Always #1” and “Always #9”
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Table 476. Revision history (continued)
Date Revision Changes

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