Register 10: GPTM Timer A Interval Load (GPTMTAILR), offset 0x028
When the timer is counting down, this register is used to load the starting count value into the timer.
When the timer is counting up, this register sets the upper bound for the timeout event.
When a GPTM is configured to one of the 32-bit modes, GPTMTAILR appears as a 32-bit register
(the upper 16-bits correspond to the contents of the GPTM Timer B Interval Load (GPTMTBILR)
register). In a 16-bit mode, the upper 16 bits of this register read as 0s and have no effect on the
state of GPTMTBILR.
GPTM Timer A Interval Load (GPTMTAILR)
16/32-bit Timer 0 base: 0x4003.0000
16/32-bit Timer 1 base: 0x4003.1000
16/32-bit Timer 2 base: 0x4003.2000
16/32-bit Timer 3 base: 0x4003.3000
16/32-bit Timer 4 base: 0x4003.4000
16/32-bit Timer 5 base: 0x4003.5000
16/32-bit Timer 6 base: 0x400E.0000
16/32-bit Timer 7 base: 0x400E.1000
Offset 0x028
Type RW, reset 0xFFFF.FFFF
16171819202122232425262728293031
TAILR
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
1111111111111111Reset
0123456789101112131415
TAILR
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
1111111111111111Reset
DescriptionResetTypeNameBit/Field
GPTM Timer A Interval Load Register
Writing this field loads the counter for Timer A. A read returns the current
value of GPTMTAILR.
0xFFFF.FFFFRWTAILR31:0
June 18, 20141004
Texas Instruments-Production Data
General-Purpose Timers
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