Texas Instruments TM4C1294NCPDT - Figure 18-8. Master Single TRANSMIT

Figure 18-8. Master Single TRANSMIT
Idle
Write Slave
Address to
I2CMSA
Write data to
I2CMDR
Read I2CMCS
Sequence
may be
omitted in a
Single Master
system
BUSBSY bit=0?
NO
Write ---0-111
to I2CMCS
YES
Read I2CMCS
BUSY bit=0?
ERROR bit=0?
YES
Error Service
Idle
YES
NO
NO
June 18, 20141290
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface