Texas Instruments TM4C1294NCPDT User Manual

Register 70: Ethernet PHY Interrupt Mask (EPHYIM), offset 0xFD4
The Ethernet PHY Interrupt Mask (EPHYIM) register provides the raw interrupt status of the
integrated Ethernet PHY.
Ethernet PHY Interrupt Mask (EPHYIM)
Base 0x400E.C000
Offset 0xFD4
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
INTreserved
RWROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:1
Ethernet PHY Interrupt Mask
DescriptionValue
An Ethernet PHY interrupt is suppressed and not sent to the
interrupt controller.
0
An Ethernet PHY interrupt is sent to the interrupt controller when
the INT bit is set in the EPHYRIS register.
1
0RWINT0
June 18, 20141588
Texas Instruments-Production Data
Ethernet Controller

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English