Texas Instruments TM4C1294NCPDT User Manual

Figure 11-22. FRAME Signal Operation, FRM50=0 and FRMCNT=0
Clock
(EPI0S31)
Frame
(EPI0S30)
RD
(EPI0S29)
WR
(EPI0S28)
If the FRMCNT field is 0x1, then the FRAME signal pulses high during every other read or write
access, see Figure 11-23 on page 852.
Figure 11-23. FRAME Signal Operation, FRM50=0 and FRMCNT=1
Clock
(EPI0S31)
Frame
(EPI0S30)
RD
(EPI0S29)
WR
(EPI0S28)
If the FRMCNT field is 0x2 and FRM50 is clear, then the FRAME signal pulses high during every third
access, and so on for every value of FRMCNT, see Figure 11-24 on page 852.
Figure 11-24. FRAME Signal Operation, FRM50=0 and FRMCNT=2
Clock
(EPI0S31)
Frame
(EPI0S30)
RD
(EPI0S29)
WR
(EPI0S28)
When FRM50 is set, the FRAME signal transitions on the rising edge of either the WR or RD strobes.
When FRMCNT=0, the FRAME signal transitions on the rising edge of WR or RD for every access,
see Figure 11-25 on page 852.
Figure 11-25. FRAME Signal Operation, FRM50=1 and FRMCNT=0
Clock (EPI0S31)
Frame
(EPI0S30)
RD (EPI0S29)
WR (EPI0S28)
When FRMCNT=1, the FRAME signal transitions on the rising edge of the WR or RD strobes for
every other access, see Figure 11-26 on page 853.
June 18, 2014852
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External Peripheral Interface (EPI)

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English