Register 66: Ethernet MAC Peripheral Property Register (EMACPP), offset
0xFC0
This register defines the Ethernet MAC and PHY type used.
Ethernet MAC Peripheral Property Register (EMACPP)
Base 0x400E.C000
Offset 0xFC0
Type RO, reset 0x0000.0103
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
PHYTYPEreservedMACTYPEreserved
ROROROROROROROROROROROROROROROROType
1100000010000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved31:11
Ethernet MAC Type
DescriptionValue
Stellaris
®
LM3S-class MAC.0x0
Tiva
™
TM4C129x-class MAC.0x1
Reserved0x2-0x7
0x1ROMACTYPE10:8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved7:3
Ethernet PHY Type
This field specifies the type of PHY provided.
DescriptionValue
No PHY0x0
Fury class PHY0x1
Tempest/Firestorm class PHY0x2
Snowflake class PHY0x3
Reserved0x4-0x7
0x3ROPHYTYPE2:0
1581June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller