Register 99: Ethernet PHY Reset Control - MR31 (EPHYRCR), address 0x01F
This register allows the system to reset or restart the PHY by register access.
Ethernet PHY Reset Control - MR31 (EPHYRCR)
Base n/a
Address 0x01F
Type RW, reset 0x0000
0123456789101112131415
reserved
SWRESTART
SWRST
RORORORORORORORORORORORORORORWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software Reset
DescriptionValue
Normal Operation.0
Soft reset. This mode resets the digital portion of the PHY and
all of the registers. This bit self clears after completion.
1
0RWSWRST15
Software Restart
DescriptionValue
Normal Operation.0
Restart PHY. This mode resets the digital portion of the PHY
but no the registers. This bit self clears after completion of the
restart.
1
0RWSWRESTART14
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved13:0
1641June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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