Texas Instruments TM4C1294NCPDT User Manual

Register 68: Bus Fault Address (FAULTADDR), offset 0xD38
Note: This register can only be accessed from privileged mode.
The FAULTADDR register contains the address of the location that generated a bus fault. When
an unaligned access faults, the address in the FAULTADDR register is the one requested by the
instruction, even if it is not the address of the fault. Bits in the Bus Fault Status (BFAULTSTAT)
register indicate the cause of the fault and whether the value in the FAULTADDR register is valid
(see page 184).
Bus Fault Address (FAULTADDR)
Base 0xE000.E000
Offset 0xD38
Type RW, reset -
16171819202122232425262728293031
ADDR
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
----------------Reset
0123456789101112131415
ADDR
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
----------------Reset
DescriptionResetTypeNameBit/Field
Fault Address
When the FAULTADDRV bit of BFAULTSTAT is set, this field holds the
address of the location that generated the bus fault.
-RWADDR31:0
3.6 Memory Protection Unit (MPU) Register Descriptions
This section lists and describes the Memory Protection Unit (MPU) registers, in numerical order by
address offset.
The MPU registers can only be accessed from privileged mode.
June 18, 2014192
Texas Instruments-Production Data
Cortex-M4 Peripherals

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English