Texas Instruments TM4C1294NCPDT User Manual

Register 9: I
2
C Master Configuration (I2CMCR), offset 0x020
This register configures the mode (Master or Slave), and sets the interface for test mode loopback.
I2C Master Configuration (I2CMCR)
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2C 2 base: 0x4002.2000
I2C 3 base: 0x4002.3000
I2C 4 base: 0x400C.0000
I2C 5 base: 0x400C.1000
I2C 6 base: 0x400C.2000
I2C 7 base: 0x400C.3000
I2C 8 base: 0x400B.8000
I2C 9 base: 0x400B.9000
Offset 0x020
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
LPBKreservedMFESFEreserved
RWRORORORWRWROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:6
I
2
C Slave Function Enable
DescriptionValue
Slave mode is disabled.0
Slave mode is enabled.1
0RWSFE5
I
2
C Master Function Enable
DescriptionValue
Master mode is disabled.0
Master mode is enabled.1
0RWMFE4
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved3:1
I
2
C Loopback
DescriptionValue
Normal operation.0
The controller in a test mode loopback configuration.1
0RWLPBK0
June 18, 20141326
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English