Register 89: PWM Clock Configuration (PWMCC), offset 0xFC8
The PWMCC register controls the clock source for the PWM module.
PWM Clock Configuration (PWMCC)
PWM0 base: 0x4002.8000
Offset 0xFC8
Type RW, reset 0x0000.0005
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
PWMDIVreservedUSEPWMreserved
RWRWRWRORORORORORWROROROROROROROType
1010000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.0000ROreserved31:9
Use PWM Clock Divisor
DescriptionValue
The system clock is the source of PWM unit clock.0
The PWM clock divider is the source of PWM unit clock.1
0x0RWUSEPWM8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved7:3
PWM Clock Divider
This field specifies the PWM clock frequency as a division of the system
clock.
DescriptionValue
/20x0
/40x1
/80x2
/160x3
/320x4
/640x5
reserved0x6 - 0x7
0x5RWPWMDIV2:0
1747June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller