Register 46: EPI Host-Bus PSRAM (EPIHBPSRAM), offset 0x360
This register holds the PSRAM configuration register value. When the WRCRE bit in the EPIHB16CFGn
register is set, all 21 bits of the EPIHBPSRAM register's CR value are written to the PSRAM's
configuration register. When the RDCRE bit is set in the EPIHB16CFGn register, a read of the
PSRAM's configuration register takes place and the value is written to bits[15:0] of the EPIHBPSRAM.
Bits[20:16] will not contain any valid data.
EPI Host-Bus PSRAM (EPIHBPSRAM)
Base 0x400D.0000
Offset 0x360
Type RW, reset 0x0000.0000
16171819202122232425262728293031
CRreserved
RWRWRWRWRWROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
CR
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000ROreserved31:21
PSRAM Config Register
During a configuration write, all 21 bits of the CR bit field are written to
the PSRAM. During configuration reads, CR bits[15:0] of this register
contain the configuration read of the PSRAM. CR[20:16] will not
contain valid data.
0x000000RWCR20:0
945June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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