Register 11: Ethernet MAC PMT Control and Status Register
(EMACPMTCTLSTAT), offset 0x02C
The Ethernet MAC PMT Control and Status (EMACPMTCTLSTAT) programs and monitors
wake-up events.
Ethernet MAC PMT Control and Status Register (EMACPMTCTLSTAT)
Base 0x400E.C000
Offset 0x02C
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reservedRWKPTRreserved
WUPFRRST
RORORORORORORORORWRWRWRORORORORWType
0000000000000000Reset
0123456789101112131415
PWRDWN
MGKPKTEN
WUPFRENreservedMGKPRXWUPRXreserved
GLBLUCAST
reserved
RWRWRWRORORORORORORWROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Wake-Up Frame Filter Register Pointer Reset
DescriptionValue
No effect.0
Resets the MAC Remote Wake-Up Frame Filter
(EMACRWUFF) register pointer to 0x0. It is automatically
cleared after one clock cycle.
1
0RWWUPFRRST31
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved30:27
Remote Wake-Up FIFO Pointer
This gives the current value (0 to 7) of the MAC Remote Wake-Up
Frame Filter (EMACRWUFF) register pointer. The contents of the
EMACRWUFF Register are transferred to the receive clock domain
when a write occurs to that register when this pointer value equals 7.
0RWRWKPTR26:24
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved23:10
Global Unicast
DescriptionValue
No Effect.0
Enables any unicast packet filtered by the MAC Destination
Address Filter (DAF) module's address recognition to be a
wake-up frame.
1
0RWGLBLUCAST9
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved8:7
1495June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller