Texas Instruments TM4C1294NCPDT - (DCGCUART), Offset 0 X818

Register 131: Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode
Clock Gating Control (DCGCUART), offset 0x818
The DCGCUART register provides software the capability to enable and disable the UART modules
in deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock is
disabled to save power.
Important: This register should be used to control the clocking for the UART modules.
Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control (DCGCUART)
Base 0x400F.E000
Offset 0x818
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
D0D1D2D3D4D5D6D7reserved
RWRWRWRWRWRWRWRWROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:8
UART Module 7 Deep-Sleep Mode Clock Gating Control
DescriptionValue
UART module 7 is disabled in deep-sleep mode.0
Enable and provide a clock to UART module 7 in deep-sleep
mode.
1
0RWD77
UART Module 6 Deep-Sleep Mode Clock Gating Control
DescriptionValue
UART module 6 is disabled in deep-sleep mode.0
Enable and provide a clock to UART module 6 in deep-sleep
mode.
1
0RWD66
UART Module 5 Deep-Sleep Mode Clock Gating Control
DescriptionValue
UART module 5 is disabled in deep-sleep mode.0
Enable and provide a clock to UART module 5 in deep-sleep
mode.
1
0RWD55
June 18, 2014436
Texas Instruments-Production Data
System Control