Register 130: Hibernation Deep-Sleep Mode Clock Gating Control (DCGCHIB),
offset 0x814
The DCGCHIB register provides software the capability to enable and disable the Hibernation
module in deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock
is disabled to save power.
Important: This register should be used to control the clocking for the Hibernation module.
Hibernation Deep-Sleep Mode Clock Gating Control (DCGCHIB)
Base 0x400F.E000
Offset 0x814
Type RW, reset 0x0000.0001
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
D0reserved
RWROROROROROROROROROROROROROROROType
1000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:1
Hibernation Module Deep-Sleep Mode Clock Gating Control
DescriptionValue
Hibernation module is disabled in deep-sleep mode.0
Enable and provide a clock to the Hibernation module in
deep-sleep mode.
1
1RWD00
435June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller