Texas Instruments TM4C1294NCPDT - Table of Contents

Table of Contents
Revision History ............................................................................................................................. 45
About This Document .................................................................................................................... 48
Audience .............................................................................................................................................. 48
About This Manual ................................................................................................................................ 48
Related Documents ............................................................................................................................... 48
Documentation Conventions .................................................................................................................. 49
1 Architectural Overview .......................................................................................... 51
1.1 Tiva™ C Series Overview .............................................................................................. 51
1.2 TM4C1294NCPDT Microcontroller Overview .................................................................. 52
1.3 TM4C1294NCPDT Microcontroller Features ................................................................... 55
1.3.1 ARM Cortex-M4F Processor Core .................................................................................. 55
1.3.2 On-Chip Memory ........................................................................................................... 57
1.3.3 External Peripheral Interface ......................................................................................... 59
1.3.4 Cyclical Redundancy Check (CRC) ............................................................................... 61
1.3.5 Serial Communications Peripherals ................................................................................ 61
1.3.6 System Integration ........................................................................................................ 67
1.3.7 Advanced Motion Control ............................................................................................... 74
1.3.8 Analog .......................................................................................................................... 76
1.3.9 JTAG and ARM Serial Wire Debug ................................................................................ 78
1.3.10 Packaging and Temperature .......................................................................................... 78
1.4 TM4C1294NCPDT Microcontroller Hardware Details ....................................................... 78
1.5 Kits .............................................................................................................................. 79
1.6 Support Information ....................................................................................................... 79
2 The Cortex-M4F Processor ................................................................................... 80
2.1 Block Diagram .............................................................................................................. 81
2.2 Overview ...................................................................................................................... 82
2.2.1 System-Level Interface .................................................................................................. 82
2.2.2 Integrated Configurable Debug ...................................................................................... 82
2.2.3 Trace Port Interface Unit (TPIU) ..................................................................................... 83
2.2.4 Cortex-M4F System Component Details ......................................................................... 83
2.3 Programming Model ...................................................................................................... 84
2.3.1 Processor Mode and Privilege Levels for Software Execution ........................................... 84
2.3.2 Stacks .......................................................................................................................... 85
2.3.3 Register Map ................................................................................................................ 85
2.3.4 Register Descriptions .................................................................................................... 87
2.3.5 Exceptions and Interrupts ............................................................................................ 103
2.3.6 Data Types ................................................................................................................. 103
2.4 Memory Model ............................................................................................................ 103
2.4.1 Memory Regions, Types and Attributes ......................................................................... 106
2.4.2 Memory System Ordering of Memory Accesses ............................................................ 107
2.4.3 Behavior of Memory Accesses ..................................................................................... 107
2.4.4 Software Ordering of Memory Accesses ....................................................................... 108
2.4.5 Bit-Banding ................................................................................................................. 109
2.4.6 Data Storage .............................................................................................................. 111
2.4.7 Synchronization Primitives ........................................................................................... 112
3June 18, 2014
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TM4C1294NCPDT Microcontroller