Register 13: DMA Channel Request Mask Clear (DMAREQMASKCLR), offset
0x024
Each bit of the DMAREQMASKCLR register represents the corresponding μDMA channel. Setting
a bit clears the corresponding SET[n] bit in the DMAREQMASKSET register.
DMA Channel Request Mask Clear (DMAREQMASKCLR)
Base 0x400F.F000
Offset 0x024
Type WO, reset -
16171819202122232425262728293031
CLR[n]
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
0123456789101112131415
CLR[n]
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
DescriptionResetTypeNameBit/Field
Channel [n] Request Mask Clear
DescriptionValue
No effect.0
Setting a bit clears the corresponding SET[n] bit in the
DMAREQMASKSET register meaning that the peripheral
associated with channel [n] is enabled to request μDMA
transfers.
1
-WOCLR[n]31:0
June 18, 2014720
Texas Instruments-Production Data
Micro Direct Memory Access (μDMA)