Texas Instruments TM4C1294NCPDT User Manual

■ MIIB: MII Busy. This bit is set to 1 to indicate that the MII is now busy with a write operation.
The EMAC clears this bit when the write has been transmitted.
Read from PHY Registers
The following describes the steps to read from an extended PHY register.
1. Check the MIIB bit in the EMACMIIADDR register to identify if the MII interface is busy. When
the MIIB bit is 0, the MII interface is available to read to the PHY registers.
2. Initiate the read by writing the EMACMIIADDR register fields:
■ PLA: Physical Layer Address of the PHY. The integrated PHY's address is 0x0.
■ MII: Register address of PHY register to be written.
■ CR: Clock Reference for the MDIO interface.
■ MIIW: Write/Read Initiation. This bit is programmed to a 0 to indicate that a read operation
is to be executed.
■ MIIB: MII Busy. This bit is set to 1 to indicate that the MII is now busy with a read operation.
The EMAC clears this bit when the write has been transmitted.
3. Wait for the MII interface to complete the read by polling the MIIB bit.
4. When the MIIB is clear, read the contents of the EMACMIIDATA register.
Read from Extended PHY Registers
The following describes the steps to read from an extended PHY register.
1. Check the MIIB bit in the EMACMIIADDR register to identify if the MII interface is busy. When
the MIIB bit is 0, the MII interface is available to read to the PHY registers.
2. Initiate the read by writing the EMACMIIADDR register fields:
■ PLA: Physical Layer Address of the PHY. The integrated PHY's address is 0x0.
■ MII: Register address of PHY register to be written.
■ CR: Clock Reference for the MDIO interface.
■ MIIW: Write/Read Initiation. This bit is programmed to a 0 to indicate that a read operation
is to be executed.
■ MIIB: MII Busy. This bit is set to 1 to indicate that the MII is now busy with a read operation.
The EMAC clears this bit when the write has been transmitted.
3. Wait for the write to complete by polling the MIIB bit.
4. When the MIIB is clear, read the contents of the EMACMIIDATA register.
20.4.3 Interface Configuration
Figure 20-13 on page 1464 shows the proper method for interfacing the Ethernet Controller to a
10/100BASE-T Ethernet jack.
1463June 18, 2014
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TM4C1294NCPDT Microcontroller

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English