Texas Instruments TM4C1294NCPDT - Register 19: DMA Channel Priority Clear (DMAPRIOCLR), Offset 0 X03 C

Register 19: DMA Channel Priority Clear (DMAPRIOCLR), offset 0x03C
Each bit of the DMAPRIOCLR register represents the corresponding µDMA channel. Setting a bit
clears the corresponding SET[n] bit in the DMAPRIOSET register.
DMA Channel Priority Clear (DMAPRIOCLR)
Base 0x400F.F000
Offset 0x03C
Type WO, reset -
16171819202122232425262728293031
CLR[n]
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
0123456789101112131415
CLR[n]
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
DescriptionResetTypeNameBit/Field
Channel [n] Priority Clear
DescriptionValue
No effect.0
Setting a bit clears the corresponding SET[n] bit in the
DMAPRIOSET register meaning that channel [n] is using the
default priority level.
1
-WOCLR[n]31:0
June 18, 2014726
Texas Instruments-Production Data
Micro Direct Memory Access (μDMA)