Register 13: ADC Digital Comparator Interrupt Status and Clear (ADCDCISC),
offset 0x034
This register provides status and acknowledgement of digital comparator interrupts. One bit is
provided for each comparator.
ADC Digital Comparator Interrupt Status and Clear (ADCDCISC)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x034
Type RW1C, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
DCINT0DCINT1DCINT2DCINT3DCINT4DCINT5DCINT6DCINT7reserved
RW1CRW1CRW1CRW1CRW1CRW1CRW1CRW1CROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:8
Digital Comparator 7 Interrupt Status and Clear
DescriptionValue
No interrupt.0
Digital Comparator 7 has generated an interrupt.1
This bit is cleared by writing a 1.
0RW1CDCINT77
Digital Comparator 6 Interrupt Status and Clear
DescriptionValue
No interrupt.0
Digital Comparator 6 has generated an interrupt.1
This bit is cleared by writing a 1.
0RW1CDCINT66
Digital Comparator 5 Interrupt Status and Clear
DescriptionValue
No interrupt.0
Digital Comparator 5 has generated an interrupt.1
This bit is cleared by writing a 1.
0RW1CDCINT55
June 18, 20141106
Texas Instruments-Production Data
Analog-to-Digital Converter (ADC)