7.1 Block Diagram
Figure 7-1. Hibernation Module Block Diagram
HIBIM
HIBRIS
HIBMIS
HIBIC
HIBRTCT
Pre-Divider
XOSC0
XOSC1
HIBRTCC
HIBRTCLD
HIBRTCM0
HIBRTCSS
RTC
Interrupts
Power
Sequence
Logic
Low Battery
Detect
LOWBAT
V
BAT
HIBCTL.PINWEN
HIBCTL.RTCWEN
HIBCTL.VABORT
Battery-Backed
Memory
16 words
HIBDATA
HIBCTL.HIBREQ
WAKE
HIB
Clock Source for
System Clock
Interrupts
to CPU
HIBCTL.RTCEN
MATCH
HIBCTL.BATCHK
HIBCTL.VBATSEL
HIBCTL.BATWKEN
RTCCLK
Low
Frequency
Oscillator
32.786 kHz
Oscillator
HIBCTL.CLK32EN
& HIBCTL.OSCSEL
HIBCTL.CLK32EN &
HIBCTL.OSCSEL
HIBIO
I/O Config.
To GPIO Module
Alternate Clock
for LPC
HIBCC.
ALTCLK1EN
HIBCC.
SYSCLKEN
Note: References to alternate clock to LPC only apply to devices which have LPC.
7.2 Signal Description
The following table lists the external signals of the Hibernation module and describes the function
of each.
The RTCCLK and TMPR[3:0] signals are alternate functions for a GPIO signal and defaults to be
a GPIO signal at reset. The column in the table below titled "Pin Mux/Pin Assignment" lists the GPIO
pin placement for the RTCCLK and TMPR[3:0] signals. The number in parentheses is the encoding
that must be programmed into the PMCn field in the GPIO Port Control (GPIOPCTL) register
(page 787) to assign each signal to its specified GPIO port pin. In addition, the AFSEL bit in the GPIO
Alternate Function Select (GPIOAFSEL) register (page 770) should be set to choose the proper
HIB function. For more information on configuring GPIOs, see “General-Purpose Input/Outputs
(GPIOs)” on page 742.
The remaining signals have a fixed pin assignment and function.
533June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
