Register 48: ADC Digital Comparator Control 0 (ADCDCCTL0), offset 0xE00
Register 49: ADC Digital Comparator Control 1 (ADCDCCTL1), offset 0xE04
Register 50: ADC Digital Comparator Control 2 (ADCDCCTL2), offset 0xE08
Register 51: ADC Digital Comparator Control 3 (ADCDCCTL3), offset 0xE0C
Register 52: ADC Digital Comparator Control 4 (ADCDCCTL4), offset 0xE10
Register 53: ADC Digital Comparator Control 5 (ADCDCCTL5), offset 0xE14
Register 54: ADC Digital Comparator Control 6 (ADCDCCTL6), offset 0xE18
Register 55: ADC Digital Comparator Control 7 (ADCDCCTL7), offset 0xE1C
This register provides the comparison encodings that generate an interrupt and/or PWM trigger.
See “Interrupt/ADC-Trigger Selector” on page 1675 for more information on using the ADC digital
comparators to trigger a PWM generator.
ADC Digital Comparator Control n (ADCDCCTLn)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0xE00
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
CIMCICCIEreservedCTMCTCCTEreserved
RWRWRWRWRWRORORORWRWRWRWRWROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.0ROreserved31:13
Comparison Trigger Enable
DescriptionValue
Disables the trigger function state machine. ADC conversion
data is ignored by the trigger function.
0
Enables the trigger function state machine. The ADC conversion
data is used to determine if a trigger should be generated
according to the programming of the CTC and CTM fields.
1
0RWCTE12
1153June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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