Register 6: Ethernet MAC MII Data Register (EMACMIIDATA), offset 0x014
The Ethernet MAC MII Data (EMACMIIDATA) register holds data that is written to and read from
the PHY register located at the address specified by the PLA and MII bit fields of the Ethernet
MAC MII Address (EMACMIIADDR) register.
Ethernet MAC MII Data Register (EMACMIIDATA)
Base 0x400E.C000
Offset 0x014
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
DATA
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved31:16
MII Data
This field contains the 16-bit data value read from the PHY after a
management read operation or the 16-bit data value to be written to the
PHY before a management write operation.
0x0RWDATA15:0
June 18, 20141486
Texas Instruments-Production Data
Ethernet Controller