Register 60: Ethernet MAC Missed Frame and Buffer Overflow Counter
(EMACMFBOC), offset 0xC20
The DMA maintains two counters to track the number of frames missed during reception. This
register reports the current value of the counters. The counter is used for diagnostic purposes. The
MISFRMCNT field indicates missed frames because of the host buffer being unavailable. The
OVFFRMCNT field indicates missed frames because of buffer overflow conditions (MTL and MAC)
and runt frames (good frames of less than 64 bytes) dropped by the MTL.
Ethernet MAC Missed Frame and Buffer Overflow Counter (EMACMFBOC)
Base 0x400E.C000
Offset 0xC20
Type RO, reset 0x0000.0000
16171819202122232425262728293031
MISCNTOVF
OVFFRMCNT
OVFCNTOVF
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
MISFRMCNT
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved31:29
Overflow Bit for FIFO Overflow Counter
This bit is set every time the overflow frame counter (bits [27:17])
overflows; that is, the RX FIFO overflows with the overflow frame counter
at maximum value. In such a scenario, the overflow frame counter is
reset to all zeros and this bit indicates the rollover happened.
0ROOVFCNTOVF28
Overflow Frame Counter
This field indicates the number of frames missed by the application. This
counter is incremented each time the TX/RX Controller indicates
overflow.
This counter is cleared when the TX/RX Controller accepts data.
0x0ROOVFFRMCNT27:17
Overflow bit for Missed Frame Counter
This bit is set every time the Missed Frame Counter (bits [15:0])
overflows; which means the DMA discards an incoming frame because
of the Host Receive Buffer being unavailable with the missed frame
counter at maximum value. In such a scenario, the Missed Frame
Counter is reset to all zeros and this bit indicates that the rollover
happened.
0x0ROMISCNTOVF16
Missed Frame Counter
This field indicates the number of frames missed by the controller
because of the Host Receive Buffer being unavailable. This counter is
incremented each time the DMA discards an incoming frame. This
counter is cleared when the DMA accepts frames.
0x0ROMISFRMCNT15:0
1575June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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