Register 16: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040
This register allows software to extend the range of the GPTMTAMATCHR when the timers are
used individually. This register holds bits 23:16 in the 16-bit modes of the 16/32-bit GPTM.
GPTM TimerA Prescale Match (GPTMTAPMR)
16/32-bit Timer 0 base: 0x4003.0000
16/32-bit Timer 1 base: 0x4003.1000
16/32-bit Timer 2 base: 0x4003.2000
16/32-bit Timer 3 base: 0x4003.3000
16/32-bit Timer 4 base: 0x4003.4000
16/32-bit Timer 5 base: 0x4003.5000
16/32-bit Timer 6 base: 0x400E.0000
16/32-bit Timer 7 base: 0x400E.1000
Offset 0x040
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
TAPSMRreserved
RWRWRWRWRWRWRWRWROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000ROreserved31:8
GPTM TimerA Prescale Match
This value is used alongside GPTMTAMATCHR to detect timer match
events while using a prescaler.
For the 16/32-bit GPTM, this field contains the entire 8-bit prescaler
match value.
0x00RWTAPSMR7:0
June 18, 20141010
Texas Instruments-Production Data
General-Purpose Timers
To Next Page
Loading...
Need help?
General
