Register 114: Inter-Integrated Circuit Sleep Mode Clock Gating Control
(SCGCI2C), offset 0x720
The SCGCI2C register provides software the capability to enable and disable the I
2
C modules in
sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled to
save power.
Important: This register should be used to control the clocking for the I
2
C modules.
Inter-Integrated Circuit Sleep Mode Clock Gating Control (SCGCI2C)
Base 0x400F.E000
Offset 0x720
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0S1S2S3S4S5S6S7S8S9reserved
RWRWRWRWRWRWRWRWRWRWROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:10
I
2
C Module 9 Sleep Mode Clock Gating Control
DescriptionValue
I
2
C module 9 is disabled in sleep mode.0
Enable and provide a clock to I
2
C module 9 in sleep mode.1
0RWS99
I
2
C Module 8 Sleep Mode Clock Gating Control
DescriptionValue
I
2
C module 8 is disabled in sleep mode.0
Enable and provide a clock to I
2
C module 8 in sleep mode.1
0RWS88
I
2
C Module 7 Sleep Mode Clock Gating Control
DescriptionValue
I
2
C module 7 is disabled in sleep mode.0
Enable and provide a clock to I
2
C module 7 in sleep mode.1
0RWS77
I
2
C Module 6 Sleep Mode Clock Gating Control
DescriptionValue
I
2
C module 6 is disabled in sleep mode.0
Enable and provide a clock to I
2
C module 6 in sleep mode.1
0RWS66
415June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller