Register 22: I
2
C Slave ACK Control (I2CSACKCTL), offset 0x820
This register enables the I
2
C slave to NACK for invalid data or command or ACK for valid data or
command. The I
2
C clock is pulled low after the last data bit until this register is written.
I2C Slave ACK Control (I2CSACKCTL)
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2C 2 base: 0x4002.2000
I2C 3 base: 0x4002.3000
I2C 4 base: 0x400C.0000
I2C 5 base: 0x400C.1000
I2C 6 base: 0x400C.2000
I2C 7 base: 0x400C.3000
I2C 8 base: 0x400B.8000
I2C 9 base: 0x400B.9000
Offset 0x820
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
ACKOENACKOVALreserved
RWRWROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:2
I
2
C Slave ACK Override Value
DescriptionValue
An ACK is sent indicating valid data or command.0
A NACK is sent indicating invalid data or command.1
0RWACKOVAL1
I
2
C Slave ACK Override Enable
DescriptionValue
A response in not provided.0
An ACK or NACK is sent according to the value written to the
ACKOVAL bit.
1
0RWACKOEN0
18.8 Register Descriptions (I
2
C Status and Control)
The remainder of this section lists and describes the I
2
C status and control registers, in numerical
order by address offset.
1347June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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