Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C
This register provides a summary of the interrupt status of the individual PWM generator blocks. If
a fault interrupt is set, the corresponding MnFAULTn input has caused an interrupt. For the fault
interrupt, a write of 1 to that bit position clears the latched interrupt status. If an block interrupt bit
is set, the corresponding generator block is asserting an interrupt. The individual interrupt status
registers, PWMnISC, in each block must be consulted to determine the reason for the interrupt and
used to clear the interrupt.
PWM Interrupt Status and Clear (PWMISC)
PWM0 base: 0x4002.8000
Offset 0x01C
Type RW1C, reset 0x0000.0000
16171819202122232425262728293031
INTFAULT0INTFAULT1INTFAULT2INTFAULT3
reserved
RW1CRW1CRW1CRW1CROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
INTPWM0INTPWM1INTPWM2INTPWM3reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000ROreserved31:20
FAULT3 Interrupt Asserted
DescriptionValue
The fault condition for PWM generator 3 has not been asserted
or is not enabled.
0
An enabled interrupt for the fault condition for PWM generator
3 is asserted or is latched.
1
Writing a 1 to this bit clears it and the INTFAULT3 bit in the PWMRIS
register.
0RW1CINTFAULT319
FAULT2 Interrupt Asserted
DescriptionValue
The fault condition for PWM generator 2 has not been asserted
or is not enabled.
0
An enabled interrupt for the fault condition for PWM generator
2 is asserted or is latched.
1
Writing a 1 to this bit clears it and the INTFAULT2 bit in the PWMRIS
register.
0RW1CINTFAULT218
1697June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
