Table 8-6. Flash Register Map (continued)
See
page
DescriptionResetTypeNameOffset
671Flash Memory Protection Program Enable 40xFFFF.FFFFRWFMPPE40x410
671Flash Memory Protection Program Enable 50xFFFF.FFFFRWFMPPE50x414
671Flash Memory Protection Program Enable 60xFFFF.FFFFRWFMPPE60x418
671Flash Memory Protection Program Enable 70xFFFF.FFFFRWFMPPE70x41C
671Flash Memory Protection Program Enable 80xFFFF.FFFFRWFMPPE80x420
671Flash Memory Protection Program Enable 90xFFFF.FFFFRWFMPPE90x424
671Flash Memory Protection Program Enable 100xFFFF.FFFFRWFMPPE100x428
671Flash Memory Protection Program Enable 110xFFFF.FFFFRWFMPPE110x42C
671Flash Memory Protection Program Enable 120xFFFF.FFFFRWFMPPE120x430
671Flash Memory Protection Program Enable 130xFFFF.FFFFRWFMPPE130x434
671Flash Memory Protection Program Enable 140xFFFF.FFFFRWFMPPE140x438
671Flash Memory Protection Program Enable 150xFFFF.FFFFRWFMPPE150x43C
8.4 Internal Memory Register Descriptions (Internal Memory Control
Offset)
This section lists and describes the memory control registers, in numerical order by address offset.
Registers in this section are relative to the memory control base address of 0x400F.D000.
June 18, 2014624
Texas Instruments-Production Data
Internal Memory