Texas Instruments TM4C1294NCPDT User Manual

Register 4: QSSI Status (SSISR), offset 0x00C
The SSISR register contains bits that indicate the FIFO fill status and the QSSI busy status.
QSSI Status (SSISR)
QSSI0 base: 0x4000.8000
QSSI1 base: 0x4000.9000
QSSI2 base: 0x4000.A000
QSSI3 base: 0x4000.B000
Offset 0x00C
Type RO, reset 0x0000.0003
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
TFETNFRNERFFBSYreserved
ROROROROROROROROROROROROROROROROType
1100000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:5
QSSI Busy Bit
DescriptionValue
The QSSI is idle.0
The QSSI is currently transmitting and/or receiving a frame, or
the transmit FIFO is not empty.
1
0ROBSY4
QSSI Receive FIFO Full
DescriptionValue
The receive FIFO is not full.0
The receive FIFO is full.1
0RORFF3
QSSI Receive FIFO Not Empty
DescriptionValue
The receive FIFO is empty.0
The receive FIFO is not empty.1
0RORNE2
QSSI Transmit FIFO Not Full
DescriptionValue
The transmit FIFO is full.0
The transmit FIFO is not full.1
1ROTNF1
June 18, 20141250
Texas Instruments-Production Data
Quad Synchronous Serial Interface (QSSI)

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English