Register 91: Ethernet PHY Receive Error Count - MR21 (EPHYRXERCNT),
address 0x015
This counter provides information required to implement the Symbol Error During Carrier attribute
within the PHY managed object class of Clause 30 of the IEEE 802.3u specification.
Ethernet PHY Receive Error Count - MR21 (EPHYRXERCNT)
Base n/a
Address 0x015
Type RO, reset 0x0000.0000
0123456789101112131415
RXERRCNT
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Receive Error Count
When a valid carrier is present (while EN0RXDV is active), and there is
at least one occurrence of an invalid data symbol, this 16-bit counter
increments for each receive error detected. The EPHYRXERCNT counter
does not count in MII loopback mode. The counter stops when it reaches
its maximum count of 0xFFFF. When the counter exceeds half-full
(0x7FFF), an interrupt is generated. This register is cleared on read.
0x0RORXERRCNT15:0
1629June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
