Register 76: PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800
Register 77: PWM1 Fault Pin Logic Sense (PWM1FLTSEN), offset 0x880
Register 78: PWM2 Fault Pin Logic Sense (PWM2FLTSEN), offset 0x900
Register 79: PWM3 Fault Pin Logic Sense (PWM3FLTSEN), offset 0x980
This register defines the PWM fault pin logic sense.
PWMn Fault Pin Logic Sense (PWMnFLTSEN)
PWM0 base: 0x4002.8000
Offset 0x800
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
FAULT0FAULT1FAULT2FAULT3reserved
RWRWRWRWROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:4
Fault3 Sense
DescriptionValue
An error is indicated if the Fault3 signal is High.0
An error is indicated if the Fault3 signal is Low.1
0RWFAULT33
Fault2 Sense
DescriptionValue
An error is indicated if the Fault2 signal is High.0
An error is indicated if the Fault2 signal is Low.1
0RWFAULT22
Fault1 Sense
DescriptionValue
An error is indicated if the Fault1 signal is High.0
An error is indicated if the Fault1 signal is Low.1
0RWFAULT11
Fault0 Sense
DescriptionValue
An error is indicated if the Fault0 signal is High.0
An error is indicated if the Fault0 signal is Low.1
0RWFAULT00
1739June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
