Register 45: ADC Sample Sequence Extended Input Multiplexer Select 3
(ADCSSEMUX3), offset 0x0B8
This register, along with the ADCSSMUX3 register, defines the analog input configuration for the
sample in a sequence executed with Sample Sequencer 3. If EMUX0 is set, the MUX0 field in the
ADCSSMUX3 register selects from AIN[19:16]. When EMUX0 is clear, the MUX0 field selects from
AIN[15:0]. This register is 1 bit wide and contains information for one possible sample.
Note that this register is not used when the differential channel designation is used (the Dn bit is set
in the ADCSSCTL3 register) because the ADCSSMUX3 register can select all the available pairs.
ADC Sample Sequence Extended Input Multiplexer Select 3 (ADCSSEMUX3)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x0B8
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
EMUX0reserved
RWROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:1
1st Sample Input Select (Upper Bit)
The EMUX0 field is used during the only sample of a sequence executed
with the sample sequencer.
DescriptionValue
The sample input is selected from AIN[15:0] using the
ADCSSMUX3 register. For example, if the MUX0 field is 0x0,
AIN0 is selected.
0
The sample input is selected from AIN[19:16] using the
ADCSSMUX3 register. For example, if the MUX0 field is 0x0,
AIN16 is selected.
1
0x0RWEMUX00
June 18, 20141146
Texas Instruments-Production Data
Analog-to-Digital Converter (ADC)
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