Texas Instruments TM4C1294NCPDT User Manual

Register 8: Hibernation Interrupt Clear (HIBIC), offset 0x020
This register is the interrupt write-one-to-clear register for the Hibernation module interrupt sources.
Writing a 1 to a bit clears the corresponding interrupt in the HIBRIS register.
Note: Writes to the RSTWK, PADIOWK and WC bits of this register are immediate and the status
may be read from the HIBRIS and HIBMIS registers without monitoring the WRC bit of the
HIBCTL register.
Note: All I/O wake sources are cleared by a write to either or both the RSTWK and PADIOWK bits.
This clears the source of interrupts for RSTWK, PADIOWK and the GPIOWAKESTAT register.
Hibernation Interrupt Clear (HIBIC)
Base 0x400F.C000
Offset 0x020
Type RW1C, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
RTCALT0reservedLOWBATEXTWWCPADIOWKRSTWKVDDFAILreserved
RW1CRORW1CRW1CRW1CRW1CRW1CRW1CROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:8
VDD Fail Interrupt Clear
Writing a 1 to this bit clears the VDDFAIL bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
0RW1CVDDFAIL7
Reset Pad I/O Wake-Up Interrupt Clear
Writing a 1 to this bit clears the RSTWK bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
0RW1CRSTWK6
Pad I/O Wake-Up Interrupt Clear
Writing a 1 to this bit clears the PADIOWK bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
0RW1CPADIOWK5
Write Complete/Capable Interrupt Clear
Writing a 1 to this bit clears the WC bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
0RW1CWC4
External Wake-Up Interrupt Clear
Writing a 1 to this bit clears the EXTW bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
0RW1CEXTW3
June 18, 2014568
Texas Instruments-Production Data
Hibernation Module

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English