Register 20: I
2
C Slave Interrupt Clear (I2CSICR), offset 0x818
This register clears the raw interrupt. A read of this register returns no meaningful data.
I2C Slave Interrupt Clear (I2CSICR)
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2C 2 base: 0x4002.2000
I2C 3 base: 0x4002.3000
I2C 4 base: 0x400C.0000
I2C 5 base: 0x400C.1000
I2C 6 base: 0x400C.2000
I2C 7 base: 0x400C.3000
I2C 8 base: 0x400B.8000
I2C 9 base: 0x400B.9000
Offset 0x818
Type WO, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
DATAICSTARTICSTOPICDMARXICDMATXICTXICRXICTXFEICRXFFICreserved
WOWOWOWOWOWOWOWOWOROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:9
Receive FIFO Full Interrupt Mask
Writing a 1 to this bit clears the RXFFIS bit in the I2CSRIS register and
the RXFFMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
0WORXFFIC8
Transmit FIFO Empty Interrupt Mask
Writing a 1 to this bit clears the TXFERIS bit in the I2CSRIS register
and the TXFEMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
0WOTXFEIC7
Receive Request Interrupt Mask
Writing a 1 to this bit clears the RXRIS bit in the I2CSRIS register and
the RXMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
0WORXIC6
Transmit Request Interrupt Mask
Writing a 1 to this bit clears the TXRIS bit in the I2CSRIS register and
the TXMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
0WOTXIC5
Transmit DMA Interrupt Clear
Writing a 1 to this bit clears the DMATXRIS bit in the I2CSRIS register
and the DMATXMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
0WODMATXIC4
June 18, 20141344
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface
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